Memory with a raised dummy feature surrounding a cell region
US10163641B2 · kind B2 · utility
4Cited by
0References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 15, 2016 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Aug 15, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6892
Abstract
A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, and at least one memory cell. The raised dummy feature is present on the semiconductor substrate and defines a cell region and a non-cell region outside of the cell region on the semiconductor substrate, and the raised dummy feature has at least one opening communicating the cell region with the non-cell region. The memory cell is present on the cell region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.