Array substrate and manufacturing method thereof, and display device
US10163938B2 · kind B2 · utility
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11Claims
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Key dates
| Filing date | Sep 23, 2016 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Sep 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/451
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a plurality of mutually parallel signal lines, an insulating layer located on a layer in which the plurality of signal lines is located and at least one first conductive structure located on the insulating layer. The insulating layer includes at least two first through holes corresponding to the first conductive structure, and the first conductive structure is electrically connected with the signal lines through the at least two first through holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.