Syndrome-based Reed-Solomon erasure decoding circuitry
US10164660B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2016 |
| Grant date | Dec 25, 2018 |
| Priority date | — |
| Expiry date | Dec 23, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit may include a Reed-Solomon decoder that receives a transmitted code word and an associated bit mask and that generates a corresponding corrected message. The bit mask indicates an erasure pattern for the received code word. The Reed-Solomon decoder may include a syndrome generator, a multiplication circuit, a read-only memory (ROM) circuit, an address compressor, and an aggregation circuit. The syndrome generator may receive the transmitted code word and generate a corresponding syndrome. The address compressor may receive the bit mask and generate a corresponding unique address for accessing the ROM circuit. The ROM circuit may then output an inverse parity matrix based on the unique address. The multiplication circuit may multiply the syndrome by the retrieved inverse parity matrix to output corrected symbols. The aggregation circuit may then path the received code word with the corrected symbols to obtain the corrected message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.