Power management of user interfaces with coordinated ultra-low power states
US10168760B2 · kind B2 · utility
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3References
17Claims
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Key dates
| Filing date | Mar 18, 2016 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Dec 1, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example method for power management of a user interface includes initiating a low power entry at a data lane of the user interface. The method further includes coordinating with a peripheral device to enter into an ultra-low power state. The peripheral device is to initiate a low power entry at the clock lane to enter the user interface into an ultra-low power state in response to detecting the low power entry at the data lane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.