Patent · US Active

Data buffer for multiple DIMM topology

US10168914B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 24, 2017
Grant dateJan 1, 2019
Priority date
Expiry dateOct 24, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C5/04
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Aspects of the embodiments include systems and devices that include a memory controller circuit element, and a printed circuit board (PCB). The PCB can include a memory module element; and a data buffer circuit element, the data buffer circuit element electrically connected to the memory controller circuit element and configured to receive instructions and data from the memory controller circuit element, the data buffer circuit element electrically connected to the memory module circuit element directly or through a socket, the data buffer circuit element configured to transmit instructions and data originated from the memory controller circuit element to the memory module circuit element and transmit data back to the memory controller.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.