Efficient emulation of guest architecture instructions
US10169043B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2015 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Nov 20, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes determining that an operation should be performed to restore 80 bits stored in memory for an 80 bit register of a guest architecture on a host having 64-bit registers. The method further includes storing 64 bits from the 80 bits in a host register. The method further includes storing the remaining 16 bits from 80 bits in supplemental memory storage. The method further includes identifying a floating point operation that should be performed to operate on the 80-bit register for the guest architecture. As a result, the method further includes using the 64 bits in the host register and the remaining 16 bits stored in memory in a supplemental memory storage to translate a floating point number represented by the 80 bits to a 64-bit floating point number and store the 64-bit floating point number in the host register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.