Array substrate and display device
US10170380B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 10, 2013 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Dec 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136254
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate and a display device are provided. The array substrate includes a display region and a peripheral circuit region, wherein a first gate line, a first data line and a pixel region are arranged in the display region; the pixel region includes a first pixel electrode and a thin film transistor, and the thin film transistor includes a first gate electrode, a first source electrode and a first drain electrode; the peripheral circuit region is provided with at least one test unit including: a second gate line; a second data line; a second testing pixel electrode; and a second testing thin film transistor. The second testing thin film transistor includes a second gate electrode, a second source electrode and a second drain electrode, wherein the second gate electrode, the second source electrode and the second drain electrode are provided with test ports exposed outside.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.