Semiconductor package with core substrate having a through hole
US10170410B2 · kind B2 · utility
1Cited by
0References
16Claims
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Assignee
Inventors
Key dates
| Filing date | May 19, 2017 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | May 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a frame having a through hole, an electronic component disposed in the through hole, a metal layer disposed on either one or both of an inner surface of the frame and an upper surface of the electronic component, a redistribution portion disposed below the frame and the electronic component, and a conductive layer connected to the metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.