Parallel CRC calculation for multiple packets without requiring a shifter
US10171108B1 · kind B1 · utility
1Cited by
1References
20Claims
0Family size
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Key dates
| Filing date | Feb 5, 2016 |
| Grant date | Jan 1, 2019 |
| Priority date | — |
| Expiry date | Mar 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/324
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided herein for removing the need to account for varying lengths of data packets that are transmitted during a single clock cycle, and to require only one CRC calculation block for handling parallel processing of a stream of data packets received during a clock cycle. Moreover, systems and methods are provided herein for eliminating a need for a shifter, such as a barrel shifter, to process the data packets of a single clock cycle in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.