Array substrate, display panel and display device including the same
US10177172B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 28, 2016 |
| Grant date | Jan 8, 2019 |
| Priority date | — |
| Expiry date | Jan 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6733
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate, and a display panel and display device including the same are disclosed. An embodiment of the array substrate comprises a display region and a non-display region. The non-display region comprises: abase substrate; and a first metal layer, a second metal layer, and a third metal layer arranged in a direction perpendicular to the base substrate. A transistor and a metal line are arranged in the non-display region. A gate electrode of the transistor is located in the first metal layer. A source electrode and a drain electrode of the transistor are located in the second metal layer. The metal line is located in the third metal layer. The orthographic projection of the transistor onto the base substrate overlaps, at least partially, with the orthographic projection of the metal line onto the base substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.