Array substrate, semiconductor device containing the same, control method thereof, and fabrication method thereof
US10180612B2 · kind B2 · utility
1Cited by
1References
19Claims
0Family size
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Key dates
| Filing date | Jun 7, 2016 |
| Grant date | Jan 15, 2019 |
| Priority date | — |
| Expiry date | Jul 11, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6871
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure provides an array substrate. The array substrate includes a display region and a plurality of control lines, the display region being divided into a plurality of sub-regions, each sub-region comprising a plurality of pixels, each pixel including a common electrode. Common electrodes in pixels in a sub-region are electrically connected together; common electrodes in two sub-regions are connected by a switching unit; and a control line is connected with the common electrodes in the sub-region to provide a common voltage signal to the common electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.