Apparatus for information processing with loop cache and associated methods
US10180839B2 · kind B2 · utility
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4References
20Claims
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Key dates
| Filing date | Mar 4, 2016 |
| Grant date | Jan 15, 2019 |
| Priority date | — |
| Expiry date | Jul 23, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a processor and a loop cache coupled to the processor. The loop cache provides to the processor instructions corresponding to a loop in the instructions. The loop cache includes a persistence counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.