Memory sparing on memory modules
US10180888B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Jan 15, 2019 |
| Priority date | — |
| Expiry date | Dec 8, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/84
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Example implementations relate to using a spare memory on a memory module. In example implementations, a memory module may have a plurality of memories, including default memories and a spare memory. A plurality of data buffers on the memory module may select data nibbles from the plurality of memories such that when a default memory is identified as defective, a data nibble is selected from the spare memory and not from the defective default memory. A data nibble selected from the default memory may be in a first position in an output of the memory module when the default memory is functional. A data nibble selected from the spare memory may be in a second position in the output of the memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.