Patent · US Active

Interface unit for routing prioritized input data to a processor

US10180917B2 · kind B2 · utility

0Cited by

3References

14Claims

0Family size

Assignee

dSPACE digital signal processing and control engineering GmbH · DE

Inventors

Jochen SAUER · Brakel, DE
Robert Leinfellner · Paderborn, DE
Matthias Klemm · Munich, DE
Thorsten Brehm · Paderborn, DE
Robert Polnau · Paderborn, DE
Matthias Schmitz · Gifhorn, DE

Key dates

Filing date	May 11, 2016
Grant date	Jan 15, 2019
Priority date	—
Expiry date	Nov 27, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/385
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An interface unit for data exchange between a first processor of a computer system and a peripheral environment. The interface unit has a number of input data channels for receiving input data from the peripheral environment and a first access management unit. The access management unit is configured to receive a request for providing the input data, stored in the number of input data channels, from a first interface processor stored in the interface unit and from a second interface processor stored in the interface unit and to provide or not to provide the input data, stored in the number of input data channels, to the first interface processor and the second interface processor. A first priority and a second priority can be stored in the first access management unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.