Processor with efficient memory access
US10185561B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2015 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | Jul 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes, in a processor, processing program code that includes memory-access instructions, wherein at least some of the memory-access instructions include symbolic expressions that specify memory addresses in an external memory in terms of one or more register names. A relationship between the memory addresses accessed by two or more of the memory-access instructions is identified, based on respective formats of the memory addresses specified in the symbolic expressions. An outcome of at least one of the memory-access instructions is assigned to be served from an internal memory in the processor, based on the identified relationship.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.