Conflict mask generation
US10185562B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 24, 2015 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | May 2, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Single Instruction, Multiple Data (SIMD) technologies are described. A processing device can include a processor core and a memory. The processor core can generate a first bitmap comprising a plurality of bits, where the plurality of bits includes a first bit that represents a first memory location. The processor core can determine that the value of the first bit is equal to the value of a second bit in the first bitmap. The processor core can determine the location of the second bit in relation to the first bit in the first bitmap. The processor core can generate a second bitmap including a third bit indicating that the first bit is the last bit in the first bitmap with the same value as the second bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.