Integrated circuit chip reinforced against front side deprocessing attacks
US10186491B2 · kind B2 · utility
0Cited by
5References
40Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 26, 2017 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | May 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5226
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip includes an interconnection stack with a cavity formed therein. The cavity extends through one or more interconnection levels of the stack. A material at least partially fills the cavity. The fill material has a selectivity to polishing and/or to etching different by more than 10% from a selectivity to polishing and/or to etching of a material forming an insulator of the interconnection stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.