Blocker tolerance in continuous-time residue generating analog-to-digital converters
US10187075B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2018 |
| Grant date | Jan 22, 2019 |
| Priority date | — |
| Expiry date | May 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/414
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Residue generation systems for use in continuous-time and hybrid ADCs are described. An exemplary system includes a filter, e.g. a FIR filter, for generating a filtered analog output based on an analog input, a quantizer for generating a digital input to a feedforward DAC based on the filtered analog output generated by the filter, a feedforward DAC for generating a feedforward path analog output based on the digital input generated by the quantizer, and a subtractor for generating a residue signal based on the feedforward path analog output. Providing a filter that filters the analog input before it is quantized advantageously allows blockers to be attenuated before they are sampled and aliased by the quantizer. At least some of the residue generation systems described herein may be implemented with relatively small design and power dissipation overheads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.