Precise low-latency GNSS satellite clock estimation
US10191157B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2016 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Jul 26, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/44
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A wide-lane ambiguity and a respective satellite wide-lane bias are determined for the collected phase measurements for each satellite for assistance in narrow-lane ambiguity resolution. Satellite correction data is determined for each satellite in an orbit solution based on the collected raw phase and code measurements and determined orbital narrow-lane ambiguity and respective orbital satellite narrow-lane bias. A slow satellite clock correction is determined based on the satellite orbital correction data, the collected raw phase and code measurements, and clock narrow-lane ambiguity and respective satellite narrow-lane bias. A low latency clock module or data processor determines lower-latency satellite clock correction data or delta clock adjustment to the slow satellite clock based on freshly or recently updated measurements of the collected raw phase measurements that are more current than a plurality of previous measurements of the collected raw phase measurements used for the slow satellite clock correction to provide lower-latency clock correction data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.