Embedded resilient distributed dataset systems and methods
US10191854B1 · kind B1 · utility
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3References
19Claims
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Key dates
| Filing date | Dec 6, 2016 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Dec 6, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for providing both low-level, physical data access and high-level, logical data access to a single process is disclosed, having a data block table with a physical memory address portion and a logical memory address portion. Data blocks that are mapped to physical memory bypass multiple logical memory address layers, such as the operating system layer and a logical block address layer, while data blocks that are mapped to the logical memory will be routed through traditional API layers, providing both increased performance and flexibility.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.