Semiconductor device and information processing device using the topology of an ising model
US10191880B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2014 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Jul 19, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device in which a ground state of an Ising model is realized, includes a spin array in which a spin unit is formed, the spin unit including a memory cell storing a value of one spin in an Ising model, a memory cell storing an interaction coefficient from an adjacent spin interacting with the spin, a memory cell storing an external magnetic field coefficient of the spin, and a circuit deciding a next state of the spin by binary majority decision logic based on a product of the value of each of the adjacent spins and the corresponding interaction coefficient, and the external magnetic field coefficient. The spin array is formed by having a plurality of the spin units, each having each spin allocated thereto, arranged and connected on a two-dimensional plane on a semiconductor substrate in the state where a topology of the Ising model is maintained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.