Thin film transistor array panel with diffusion barrier layer and gate insulation layer and organic light emitting diode display including the same
US10192944B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2016 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Aug 16, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1201
Abstract
An exemplary embodiment of the present invention provides a thin film transistor array panel and an organic light emitting diode display including the same including a substrate, a semiconductor disposed on the substrate, a first gate insulation layer disposed on the semiconductor, and a first diffusion barrier layer disposed on the first gate insulation layer. A second diffusion barrier layer is disposed on a lateral surface of the first diffusion barrier layer. A first gate electrode is disposed on the first diffusion barrier layer. A source electrode and a drain electrode are connected to the semiconductor. The first diffusion barrier layer comprises a metal, and the second diffusion barrier layer comprises a metal oxide including the metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.