Power-on reset system for secondary supply domain
US10193545B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2017 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Aug 28, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A POR circuit for a secondary supply domain of an IC. A bias and reference circuit provides startup current and a reference voltage for a comparator. The comparator compares the reference voltage with a primary supply voltage and develops a bias current. The bias and reference circuit and the comparator includes a VGS loop which mirrors the bias current to develop the reference voltage. When the comparator switches, the bias current is at the low quiescent current level. A level shift and isolation circuit initially isolates a primary POR signal from the secondary domain. When the comparator switches, the primary POR signal is detected and level shifted to control the reset state. The delay circuit senses ramping of the secondary supply voltage and provides a delayed secondary POR signal a predetermined time period after the secondary supply voltage achieves a predetermined voltage threshold to additionally control the reset state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.