Wired circuit board
US10194861B2 · kind B2 · utility
4Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2016 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Jun 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0376
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A wired circuit board includes an insulating layer and a conductive pattern embedded in the insulating layer. The conductive pattern has an exposed surface exposed from one surface in a thickness direction of the insulating layer and the insulating layer has the number of times of folding endurance measured in conformity with JIS P8115 (2001) of 10 times or more.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.