Synchronization processing unit, device, and system
US10198375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Mar 29, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a synchronization processing unit etc. including a command determination unit that determines whether the memory access command is a command for synchronization processing; a completion determination unit that determines whether a memory access command is complete; an issuance unit configured to issue a memory access command determined not to be for the synchronization processing to the memory, and that suspends issuance of a memory access command determined to be for the synchronization processing until completion of a preceding memory access command received before the memory access command for the synchronization processing is determined and then issues the suspended memory access command; and a subsequent control unit that, during a period from the suspension of the memory access command to the issuance and then completion thereof, performs control so that a subsequent memory access command is not received from the external device and the processor in the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.