System and method for profiling during an electronic design simulation
US10198540B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | May 2, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a computer-implemented method for electronic design simulation using a profiler. The method may include simulating, using a computing device, an electronic design associated with a programming language. The method may further include recording a first time corresponding to a first user-defined point in the simulation. The method may also include recording a second time corresponding to a second user-defined point in the simulation. The method may further include determining a difference in time between the first and second times and displaying a visualization including at least one of the first time, the second time, a value of a variable at the first time, a value of the variable at a second time, and the difference in time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.