Secure privilege level execution and access protection
US10198578B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2016 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Dec 5, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/031
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The subject disclosure is directed towards using one or more of hardware, a hypervisor, and privileged mode code to prevent system mode code from accessing user mode data and/or running user mode code at the system privilege level, or vice-versa. Also described is (in systems with a hypervisor) preventing non-hypervisor code from running in hypervisor mode or accessing hypervisor-only data, or vice-versa. A register maintained by hardware, hypervisor, or system mode code contains data access and execution polices for different chunks of addressable space with respect to which requesting entities (hypervisor mode code, system mode code, user mode code) have access to or can execute code in a given chunk. When a request to execute code or access data with respect to an address is received, the request is processed to determine to which chunk the address corresponds. The policy for that chunk is evaluated to determine whether to allow or deny the request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.