Method of fabricating FinFET structure

US10199279B2 · kind B2 · utility

Assignee

• SAMSUNG ELECTRONICS CO., LTD. · KR

Inventors

• Junggun You · Ansan-si, KR
• Sukhoon Jeong · Suwon-si, KR

Key dates

• Filing date: Oct 25, 2017
• Grant date: Feb 5, 2019
• Expiry date: Oct 25, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0172

Abstract

A method of fabricating a semiconductor device includes forming a first well region and a second well region in a semiconductor substrate, forming an isolation region defining a first fin active region and a second fin active region on the semiconductor substrate, forming a sacrificial gate layer on the semiconductor substrate having the first and second fin active regions and the isolation region, forming a hardmask line on the sacrificial gate layer, forming a gate cut mask having a gate cut opening on the hardmask line, and forming first and second hardmask patterns spaced apart from each other by etching the hardmask line using the gate cut mask as an etching mask. The gate cut opening overlaps a boundary between the first and second well regions formed between the first and second fin active regions, and has a line shape in a direction intersecting the hardmask line.