Semiconductor device and method of fabricating the same
US10199325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Oct 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76832
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes first metal lines on a lower layer, a dielectric barrier layer provided on the lower layer to cover side and top surfaces of the first metal lines, an etch stop layer provided on the dielectric barrier layer to define gap regions between the first metal lines, an upper insulating layer on the etch stop layer, and a conductive via penetrating the upper insulating layer, the etch stop layer, and the dielectric barrier layer to contact a top surface of a first metal line. The etch stop layer includes first portions on the first metal lines and second portions between the first metal lines. The second portions of the etch stop layer are higher than the first portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.