Vertical transistor with improved robustness

US10199491B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Rainald Sander · Oberhaching, DE
• Markus Winkler · Munich, DE
• Michael Asam · Aichach, DE
• Matthias Stecher · Munich, DE

Key dates

• Filing date: Aug 3, 2016
• Grant date: Feb 5, 2019
• Expiry date: Aug 3, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/111

Abstract

A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A plurality of gate electrodes is arranged in trenches of the semiconductor body. The trenches have a longitudinal direction and extending parallel relative to each other. The longitudinal direction of the trenches extends in a first lateral direction of the semiconductor body. The body regions and the source regions are arranged between the trenches. The body regions are arranged between the drift region and the source regions in a vertical direction of the semiconductor body. In the first horizontal surface, the source regions and the body regions are arranged alternately in the first lateral direction. A source electrode is electrically connected to the source regions and the body regions in the first horizontal surface.