Electrical systems having interleaved DC interconnects
US10199977B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Oct 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10522
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electrical systems and devices with substrate interconnections having reduced parasitic inductance are provided. A first substrate includes one or more capacitors and plurality of connection interfaces, wherein a first subset of connection interfaces electrically connected to a first reference voltage are interleaved with a second subset of connection interfaces electrically connected to a different reference voltage. A second substrate includes a third subset of connection interfaces are electrically connected to a first terminal of a first switching element and the first subset of connection interfaces and a fourth subset of connection interfaces electrically connected to a second terminal of a second switching element and the second subset of connection interfaces, and the third subset and the fourth subset are also interleaved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.