Precision modulation timer (PMT) integrated in a programmable logic device
US10200040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2018 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Apr 11, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00247
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A timer block includes: a digital control block including a mode selector and a register loading a time delay; a counter coupled to the register of the digital control block, wherein the counter loads a counter value corresponding to the time delay based on an operational mode selected by the mode selector and generates a digital output indicating the counter value that is decremented at each clock; and a pulse generator configured to generate a pulse signal based on the counter value of the counter. The timer block is integrated in a programmable logic device (PLD) including a programmable fabric and a signal wrapper that is configured to provide signals between the timer block and the programmable fabric. The operational mode of the timer block is programmably configured using the programmable fabric and the signal wrapper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.