Global shutter scheme that reduces the effects of dark current
US10200644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2016 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Jan 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An imaging array having a plurality of pixel sensors connected to a bit line is disclosed. Each pixel sensor includes a first photodetector having a photodiode, a floating diffusion node, and an amplifier. The floating diffusion node is characterized by a parasitic photodiode and parasitic capacitance. The amplifier amplifies a voltage on the floating diffusion node to produce a signal on an amplifier output. The first photodetector also includes a bit line gate that connects the amplifier output to the bit line in response to a row select signal and a voltage dividing capacitor having a first terminal connected to the floating diffusion node and a second terminal connected to a drive source that switches a voltage on the second terminal between a drive potential different from ground and ground in response to a drive control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.