Tigersharc DSP boot management chip and method
US10203962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2016 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Aug 15, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A TigerSharc DSP boot management chip and the method thereof, the boot management chip comprises an interface unit, a two-port RAM unit, a management unit and a DSP download management unit; further comprises a flash drive unit and a NOR flash chip; the management unit is connected to the flash drive unit; the two-port RAM unit is connected to the NOR flash chip via the flash drive unit; and, the NOR flash chip is communicated with the DSP download management unit via the flash drive unit. The management unit provides two booting modes: booting via the NOR flash chip or booting via an external bus; the host boot startup method is improved and two booting program download methods are provides, which can greatly improve the booting speed of the TigerSharc DSP chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.