Image processing circuit and display device including the same
US10204538B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2016 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Nov 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/16
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image processing circuit includes a mapper configured to convert an image signal into an intermediate data signal, and a renderer configured to convert the intermediate data signal into a data signal, wherein the renderer includes a memory configured to store the intermediate data signal and a flag signal, and a rendering circuit configured to output a data signal corresponding to a current line in response to a next intermediate data signal corresponding to a next line, to output a current intermediate data signal corresponding to the current line from the memory, and to output a previous flag signal corresponding to a previous line from the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.