Shift register unit and drive method thereof, shift register and display apparatus
US10204587B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 14, 2017 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Aug 14, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.