Patent · US Active

Activation of memory core circuits in an integrated circuit

US10204674B2 · kind B2 · utility

2Cited by

7References

1Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Thomas Kalla · Eppelheim, DE
Jens Noack · Stuttgart, DE
Juergen Pille · Stuttgart, DE
Philipp Salz · Eppelheim, DE

Key dates

Filing date	Dec 22, 2017
Grant date	Feb 12, 2019
Priority date	—
Expiry date	Dec 22, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/83
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In an approach to activating at least one memory core circuit of a plurality of memory core circuits in an integrated circuit, one or more computer processors activate a clock signal of a currently selected memory core circuit. The one or more computer processors activate the clock signal of a previously selected memory core circuit to allow the previously selected memory core circuit to be set to a deselected operating mode. The one or more computer processors forward an output bit generated by a memory core circuit selected from a plurality of memory core circuits to a multiplexed bit line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.