Semiconductor structure and manufacturing method thereof
US10204905B2 · kind B2 · utility
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2References
20Claims
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Key dates
| Filing date | Jun 23, 2017 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Jun 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0128
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a substrate, a first gate structure, and a second gate structure. The substrate has a plurality of first fins and a plurality of second fins, wherein a first pitch between two adjacent first fins is greater than a second pitch between two adjacent second fins. The first gate structure crosses over the first fins. The second gate structure crosses over the second fins, wherein the second gate structure includes an upper portion having two first sidewalls substantially parallel to each other and a lower portion tapers toward the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.