Metal-insulator-metal capacitor analog memory unit cell
US10204907B2 · kind B2 · utility
4Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2018 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Aug 6, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A memory device including a plurality of memory unit cells arranged in a crossbar configuration for a neural network is provided. Each of the memory unit cells includes a readout transistor, a charging transistor, a discharging transistor, and a metal-insulator-metal (MIM) capacitor connected to one of source/drain regions of each of the charging transistor and the discharging transistor and a functional gate of the readout transistor for storing analog information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.