Multistage amplifier linearization in a radio frequency system
US10205426B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2017 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Aug 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W88/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A linearization circuit reduces intermodulation distortion in an amplifier that includes a first stage and a second stage. The linearization circuit receives a first signal that includes a first frequency and a second frequency and generates a difference signal having a frequency approximately equal to the difference of the first frequency and the second frequency, generates an envelope signal based at least in part on a power level of the first signal, and adjusts a magnitude of the difference signal based on the envelope signal. When the amplifier receives the first signal at an input terminal, the first stage receives the adjusted signal, and the second stage does not receive the adjusted signal, intermodulation between the adjusted signal and the first signal cancels at least a portion of the intermodulation between the first frequency and the second frequency from the output of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.