Circuits and methods for reducing the amplitude of complex signals
US10205617B2 · kind B2 · utility
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Key dates
| Filing date | Jul 24, 2013 |
| Grant date | Feb 12, 2019 |
| Priority date | — |
| Expiry date | Aug 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2623
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
For crest factor reduction in a first signal having first and second components, the first component is delayed. A second signal is generated in response to detecting that a peak in the first component exceeds a predetermined threshold. Amplitude of the peak in the first component is reduced in response to detecting that the peak in the first component exceeds the predetermined threshold. Reducing amplitude of the peak in the first component includes adding the second signal to the delayed first component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.