Low cost apparatus for insitu testing of packaged integrated circuits during stressing
US10209297B2 · kind B2 · utility
0Cited by
4References
22Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 11, 2016 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | May 17, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/0458
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus with a burn-in board containing a microcontroller unit and a heater socket for insitu testing of a packaged integrated circuit while under stress. A method for insitu testing of a packaged integrated circuit while under stress. A method for insitu testing of multiple packaged integrated circuits while under stress.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.