Gate driver on array circuit and driving method thereof, and display device
US10210835B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2017 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | Jul 21, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.