Semiconductor memory device and a chip stack package having the same
US10211123B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 16, 2017 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | Aug 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes an integrated circuit (IC) chip structure, wherein the IC chip includes a substrate, a memory cell disposed on the substrate, and a local well disposed on the substrate, wherein a conductivity type of the local well is different from a conductivity type of the substrate, a wiring stack structure disposed on the IC chip structure, wherein the wiring stack structure includes a signal transfer pattern connected to the memory cell through a signal interconnector, and a thermal dispersion pattern connected to the local well through a thermal interconnector, and a heat transfer structure connected to the thermal dispersion pattern for transferring heat to the thermal dispersion pattern from a heat source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.