Semiconductor device including channel pattern and manufacturing method thereof
US10211322B1 · kind B1 · utility
8Cited by
6References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 14, 2018 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | Feb 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6219
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a channel pattern on a substrate, the channel pattern extending in a first direction; a gate pattern on the substrate, the gate pattern extending in a second direction crossing the first direction and surrounding the channel pattern; and an interface layer between the channel pattern and the gate pattern, the interface layer being formed on at least one surface of an upper surface and a lower surface of the channel pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.