Arrangement with circuit carrier for an electronic device
US10211550B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2017 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | Aug 2, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10424
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An arrangement for an electronic device is disclosed. A plurality of electrically conductive pins is positioned in respective vias of the circuit carrier, the pins extend from a first face of the circuit carrier to a contact end in order to electrically contact one or more components. The arrangement is equipped with an electrically insulating layer on a circuit carrier face, which is the first or a second face, in the region of the pin, the insulating layer having a prefabricated element which is positioned on the face of the circuit carrier. A portion of each pin, the portion being arranged adjacently to the respective via on the face, is surrounded by the material of the insulating layer in a continuously lateral manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.