Hybrid CMOS-MEMS devices adapted for high-temperature operation and method for their manufacture
US10214415B1 · kind B1 · utility
2Cited by
4References
19Claims
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Key dates
| Filing date | Mar 2, 2018 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Mar 2, 2038 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0742
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A silicon carbide based MOS integrated circuit is monolithically integrated with a suspended piezoelectric aluminum nitride member to form a high-temperature-capable hybrid MEMS-over-MOS structure. In the integrated structure, a post-MOS passivation layer of silicon carbide is deposited over the MOS passivation and overlain by a structural layer of the MEMS device. Electrical contact to refractory metal conductors of the MOS integrated circuit is provided by tungsten vias that are formed so as to pass vertically through the structural layer and the post-MOS passivation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.