Scheduler of processes having timed predictions of computing loads
US10216541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2016 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Apr 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/40
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A scheduler of computer processes. The scheduler comprises first processing logic configured to obtain predictions of a computing load of a computer process to allocate. Predictions are associated with a period of time. The processing logic retrieves predictions of available computing capacities for the period of time, and determines, based on the predictions, a processing capability to allocate at least one computer process during the period of time. The scheduler may comprise second processing logic configured to create at least one Operating-System-Level virtual environment, for a computer program, that has a computing capacity equal to or higher than the predicted computing load of at least one computer process to allocate at a start of the period of time. The second processing logic may adapt the computing capacity of an Operating-System-Level virtual environment to the predictions of the computing load of at least one computer process during the period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.