Diagnostic fault communication
US10216559B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 2016 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Feb 17, 2037 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB60Y2400/3032
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Described embodiments provide circuits, systems and methods for detecting and communicating fault conditions. In an embodiment, an integrated circuit includes a fault detector to detect a fault condition of the integrated circuit and a controller to generate output data of the integrated circuit. An output generator generates an output signal of the integrated circuit. The output signal is generated at a first set of output levels based upon the output data when the fault detector does not detect the fault condition, and the output signal is generated at a second set of output levels based upon the output data when the fault detector detects the fault condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.