Patent · US Active

Bus bridge for translating requests between a module bus and an axi bus

US10216669B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

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Inventors

Key dates

Filing dateFeb 23, 2016
Grant dateFeb 26, 2019
Priority date
Expiry dateNov 11, 2036

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4282
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for bus bridging includes providing a bus interface device that is coupled between at least one module bus and at least one advanced extensible interface (AXI) bus for translating bus requests between the module bus and the AXI bus. The bus interface device includes logic. The logic is configured to receive a read/write (R/W) request that is one of a module bus protocol R/W request and an AXI bus protocol R/W request and to buffer the R/W request to provide a buffered R/W request. The logic translates the buffered R/W request to a first AXI protocol conforming request if the buffered R/W request is the module bus protocol R/W request and translates the buffered R/W request to a first module bus protocol conforming request if the buffered R/W request is the AXI bus protocol R/W request. The translated requests are transmitted to their respective bus.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.